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Z3 (computer)

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   First working programmable, fully automatic digital computer
   For other uses, see Z3.

   Zuse Z3 replica on display at Deutsches Museum in Munich

   The Z3 was a German electromechanical computer designed by Konrad Zuse
   in 1938, and completed in 1941. It was the world's first working
   programmable, fully automatic digital computer.^[1] The Z3 was built
   with 2,600 relays, implementing a 22-bit word length that operated at a
   clock frequency of about 5-10 Hz.^[2] Program code was stored on
   punched film. Initial values were entered manually.^[3]^[4]^[5]^: 32-37

   The Z3 was completed in Berlin in 1941. It was not considered vital, so
   it was never put into everyday operation.^[3]^[4]^[6]^[5]^: 30, 38-39
   ^[a] Based on the work of the German aerodynamics engineer Hans Georg
   Kuessner (known for the Kuessner effect), a "Program to Compute a
   Complex Matrix"^[b] was written and used to solve wing flutter
   problems. Zuse asked the German government for funding to replace the
   relays with fully electronic switches, but funding was denied during
   World War II since such development was deemed "not
   war-important".^[10]^: 148

   The original Z3 was destroyed on 21 December 1943 during an Allied
   bombardment of Berlin. That Z3 was originally called V3 (Versuchsmodell
   3 or Experimental Model 3) but was renamed so that it would not be
   confused with Germany's V-weapons.^[11] A fully functioning replica was
   built in 1961 by Zuse's company, Zuse KG, which is now on permanent
   display at Deutsches Museum in Munich.^[5]^: 30

   The Z3 was demonstrated in 1998 to be, in principle,
   Turing-complete.^[12] However, because it lacked conditional branching,
   the Z3 only meets this definition by speculatively computing all
   possible outcomes of a calculation.

   Thanks to this machine and its predecessors, Konrad Zuse has often been
   suggested as the inventor of the computer.^[13]^[14]^[15]^[16]
   [ ]

Contents

     * 1 Design and development
     * 2 Instruction set
     * 3 Z3 as a universal Turing machine
     * 4 Relation to other work
     * 5 Specifications
     * 6 Modern reconstructions
     * 7 See also
     * 8 Notes
     * 9 References
     * 10 Further reading
     * 11 External links

Design and development[edit]

   Zuse designed the Z1 in 1935 to 1936 and built it from 1936 to 1938.
   The Z1 was wholly mechanical and only worked for a few minutes at a
   time at most. Helmut Schreyer advised Zuse to use a different
   technology. As a doctoral student at the Berlin Institute of Technology
   in 1937 he worked on the implementation of Boolean operations and (in
   today's terminology) flip-flops on the basis of vacuum tubes. In 1938,
   Schreyer demonstrated a circuit on this basis to a small audience, and
   explained his vision of an electronic computing machine - but since the
   largest operational electronic devices contained far fewer tubes this
   was considered practically infeasible.^[17] In that year when
   presenting the plan for a computer with 2,000 electron tubes, Zuse and
   Schreyer, who was an assistant at Wilhelm Staeblein's [de]
   Telecommunication Institute at the Technical University of Berlin, were
   discouraged by members of the institute who knew about the problems
   with electron tube technology.^[9]^: 113, 152 Zuse later recalled:
   "They smiled at us in 1939, when we wanted to build electronic machines
   ... We said: The electronic machine is great, but first the components
   have to be developed."^[9]^: 102 In 1940, Zuse and Schreyer managed to
   arrange a meeting at the Oberkommando der Wehrmacht (OKW) to discuss a
   potential project for developing an electronic computer, but when they
   estimated a duration of two or three years, the proposal was
   rejected.^[9]^: 115

   Zuse decided to implement the next design based on relays. The
   realization of the Z2 was helped financially by Kurt Pannke, who
   manufactured small calculating machines. The Z2 was completed and
   presented to an audience of the Deutsche Versuchsanstalt fuer Luftfahrt
   ("German Laboratory for Aviation") in 1940 in Berlin-Adlershof. Zuse
   was lucky - this presentation was one of the few instances where the Z2
   actually worked and could convince the DVL to partly finance the next
   design.^[17]

   Improving on the basic Z2 machine, he built the Z3 in 1941, which was a
   highly secret project of the German government.^[18] Joseph Jennissen
   (1905-1977),^[19] member of the "Research-Leadership"
   (Forschungsfuehrung) in the Reich Air Ministry^[20] acted as a
   government supervisor for orders of the ministry to Zuse's company ZUSE
   Apparatebau.^[21] A further intermediary between Zuse and the Reich Air
   Ministry was the aerodynamicist Herbert A. Wagner.^[22]

   The Z3 was completed in 1941 and was faster and far more reliable than
   the Z1 and Z2. The Z3 floating-point arithmetic was improved over that
   of the Z1 in that it implemented exception handling "using just a few
   relays", the exceptional values (plus infinity, minus infinity and
   undefined) could be generated and passed through operations. It further
   added a square root instruction.

   The Z3, like its predecessors, stored its program on an external
   punched tape, thus no rewiring was necessary to change programs.
   However, it did not have conditional branching found in later universal
   computers.^[23]^: 7

   On 12 May 1941, the Z3 was presented to an audience of scientists
   including the professors Alfred Teichmann and Curt Schmieden^[24] of
   the Deutsche Versuchsanstalt fuer Luftfahrt ("German Laboratory for
   Aviation") in Berlin,^[25] today known as the German Aerospace Center
   in Cologne.^[26]

   Zuse moved on to the Z4 design, which he completed in a bunker in the
   Harz mountains, alongside Wernher von Braun's ballistic missile
   development. When World War II ended, Zuse retreated to Hinterstein in
   the Alps with the Z4, where he remained for several years.^[27]

Instruction set[edit]

   The Z3 operated as a stack machine with a stack of two registers, R1
   and R2. The first load operation in a program would load the contents
   of a memory location into R1; the next load operation would load the
   contents of a memory location into R2. Arithmetic instructions would
   operate on the contents of R1 and R2, leaving the result in R1, and
   clearing R2; the next load operation would load into R2. A store
   operation would store the contents of R1 into a memory location, and
   clear R1; the next load operation would load the contents of a memory
   location into R1.^[23]^: 8

   A read keyboard operation would read a number from the keyboard into R1
   and clear R2. A display instruction would display the contents of R1
   and clear R2; the next load instruction would load into R2.^[23]^: 8

Z3 as a universal Turing machine[edit]

   It was possible to construct loops on the Z3, but there was no
   conditional branch instruction. Nevertheless, the Z3 was
   Turing-complete - how to implement a universal Turing machine on the Z3
   was shown in 1998 by Raul Rojas. He proposed that the tape program
   would have to be long enough to execute every possible path through
   both sides of every branch. It would compute all possible answers, but
   the unneeded results would be canceled out (a kind of speculative
   execution). Rojas concludes, "We can therefore say that, from an
   abstract theoretical perspective, the computing model of the Z3 is
   equivalent to the computing model of today's computers. From a
   practical perspective, and in the way the Z3 was really programmed, it
   was not equivalent to modern computers."^[12]

   This seeming limitation belies the fact that the Z3 provided a
   practical instruction set for the typical engineering applications of
   the 1940s. Mindful of the existing hardware restrictions, Zuse's main
   goal at the time was to have a workable device to facilitate his work
   as a civil engineer.^[28]

Relation to other work[edit]

   The success of Zuse's Z3 is often attributed to its use of the simple
   binary system.^[5]^: 21 This was invented roughly three centuries
   earlier by Gottfried Leibniz; Boole later used it to develop his
   Boolean algebra. Zuse was inspired by Hilbert's and Ackermann's book on
   elementary mathematical logic Principles of Mathematical Logic.^[9]^:
   113, 152 In 1937, Claude Shannon introduced the idea of mapping Boolean
   algebra onto electronic relays in a seminal work on digital circuit
   design. Zuse, however, did not know of Shannon's work and developed the
   groundwork independently^[10]^: 149 for his first computer Z1, which he
   designed and built from 1935 to 1938.

   Zuse's coworker Helmut Schreyer built an electronic digital
   experimental model of a computer using 100 vacuum tubes^[29] in 1942,
   but it was lost at the end of the war.

   An analog computer was built by the rocket scientist Helmut Hoelzer in
   1942 at the Peenemuende Army Research Center to simulate^[30]^[31]^[32]
   V-2 rocket trajectories.^[33]^[34]

   The Tommy Flowers-built Colossus (1943)^[35]^[36] and the
   Atanasoff-Berry Computer (1942) used thermionic valves (vacuum tubes)
   and binary representation of numbers. Programming was by means of
   re-plugging patch panels and setting switches.^[citation needed]

   The ENIAC computer, completed after the war, used vacuum tubes to
   implement switches and used decimal representation for numbers. Until
   1948 programming was, as with Colossus, by patch leads and
   switches.^[37]^[38]

   The Manchester Baby of 1948 along with the Manchester Mark 1 and EDSAC
   both of 1949 were the world's earliest working computers that stored
   program instructions and data in the same space. In this they
   implemented the stored-program concept which is frequently (but
   erroneously) attributed to a 1945 paper by John von Neumann and
   colleagues.^[39]^[40] Von Neumann is said to have given due credit to
   Alan Turing,^[35]^[41] and the concept had actually been mentioned
   earlier by Konrad Zuse himself, in a 1936 patent application (that was
   rejected).^[42]^[43] Konrad Zuse himself remembered in his memoirs:
   "During the war it would have barely been possible to build efficient
   stored program devices anyway."^[44] and Friedrich L. Bauer wrote: "His
   visionary ideas (live programs) which were only to be published years
   afterwards aimed at the right practical direction but were never
   implemented by him."^[45]^[46]

Specifications[edit]

     * Average calculation speed: addition - 0.8 seconds, multiplication -
       3 seconds^[2]
     * Arithmetic unit: Binary floating-point, 22-bit, add, subtract,
       multiply, divide, square root^[2]
     * Data memory: 64 words with a length of 22 bits^[2]
     * Program memory: Punched celluloid tape^[2]
     * Input: Decimal floating-point numbers^[2]
     * Output: Decimal floating-point numbers^[2]
     * Input and Output was facilitated by a terminal, with a special
       keyboard for input and a row of lamps to show results^[17]
     * Elements: Around 2,000 relays (1,400 for the memory)^[17]
     * Frequency: 5-10 hertz^[2]
     * Power consumption: Around 4,000 watts^[2]
     * Weight: Around 1 tonne (2,200 lb)^[2]

Modern reconstructions[edit]

   Z3 reconstruction in 2010 by Horst Zuse

   A modern reconstruction directed by Raul Rojas and Horst Zuse started
   in 1997 and finished in 2003. It is now in the Konrad Zuse Museum in
   Huenfeld, Germany.^[47]^[48] Memory was halved to 32 words. Power
   consumption is about 400 W, and weight is about 30 kilograms
   (66 lb).^[49]

   In 2008, Horst Zuse started a reconstruction of the Z3 by himself.^[50]
   It was presented in 2010 in the Konrad Zuse Museum in
   Huenfeld.^[51]^[52]

See also[edit]

     * History of computing hardware
     * Reverse Polish notation (RPN)

Notes[edit]

    1. ^ It could solve problems like systems of linear equations and
       their determinants, quadratic equations and Eigenvalues (for wing
       flutter).^[7]^[8]
    2. ^ German: Programm fuer die Berechnung einer komplexen Matrix^[9]

References[edit]

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     ^ Copeland, Brian Jack, ed. (2006). Colossus: The Secrets of
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     ^ Zuse, Konrad (2010-04-20). Der Computer - Mein Lebenswerk (in
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Further reading[edit]

     *

   Rojas, Raul; Darius, Frank; Goektekin, Cueneyt; Heyne, Georg
   (2005-08-22). "The reconstruction of Konrad Zuse's Z3". IEEE Annals of
   the History of Computing. 27 (3): 23-32. doi:10.1109/mahc.2005.48.
   eISSN 1934-1547. ISSN 1058-6180. S2CID 16288658.

     Rojas, Raul (Spring 2006) [2005-05-12]. "The Zuse Computers".
   Resurrection: The Bulletin of the Computer Conservation Society (edited
   transscript of speech). Vol. 37. Computing Before Computers seminar,
   Science Museum. ISSN 0958-7403. Archived from the original on
   2022-04-07. Retrieved 2008-07-26.

External links[edit]

   Wikimedia Commons has media related to Zuse Z3.

     * Z3 page at Horst Zuse's website
     * The Life and Work of Konrad Zuse
     * Paul E. Ceruzzi Collection on Konrad Zuse (CBI 219). Charles
       Babbage Institute, University of Minnesota. Collection contains
       published reports, articles, product literature, and other
       materials.

     * v
     * t
     * e

   Computers designed by Konrad Zuse

     * Z1 (1938)
     * Z2 (1940)
     * Z3 (1941)
     * Z4 (1945)
     * Z5 (1953)
     * Z11 (1955)
     * Z22 (1955)
     * Z23 (1961)
     * Z25 (1963)
     * Z31 (1963)
     * Z64 (1961)
     * S1 (1942)
     * S2 (1943)

     * v
     * t
     * e

   Processor technologies

   Models

     * Abstract machine
     * Stored-program computer
     * Finite-state machine
          + with datapath
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          + Power ISA
     * Clipper architecture
     * SPARC
     * SuperH
     * DEC Alpha
     * ETRAX CRIS
     * M32R
     * Unicore
     * Itanium
     * OpenRISC
     * RISC-V
     * MicroBlaze
     * LMC
     * System/3x0
          + S/360
          + S/370
          + S/390
          + z/Architecture
     * Tilera ISA
     * VISC architecture
     * Epiphany architecture
     * Others

   Execution

   Instruction pipelining
     * Pipeline stall
     * Operand forwarding
     * Classic RISC pipeline

   Hazards
     * Data dependency
     * Structural
     * Control
     * False sharing

   Out-of-order
     * Scoreboarding
     * Tomasulo algorithm
          + Reservation station
          + Re-order buffer
     * Register renaming
     * Wide-issue

        Speculative
     * Branch prediction
     * Memory dependence prediction

   Parallelism

   Level
     * Bit
          + Bit-serial
          + Word
     * Instruction
     * Pipelining
          + Scalar
          + Superscalar
     * Task
          + Thread
          + Process
     * Data
          + Vector
     * Memory
     * Distributed

   Multithreading
     * Temporal
     * Simultaneous
          + Hyperthreading
     * Speculative
     * Preemptive
     * Cooperative

   Flynn's taxonomy
     * SISD
     * SIMD
          + Array processing (SIMT)
          + Pipelined processing
          + Associative processing
          + SWAR
     * MISD
     * MIMD
          + SPMD

   Processor
   performance

     * Transistor count
     * Instructions per cycle (IPC)
          + Cycles per instruction (CPI)
     * Instructions per second (IPS)
     * Floating-point operations per second (FLOPS)
     * Transactions per second (TPS)
     * Synaptic updates per second (SUPS)
     * Performance per watt (PPW)
     * Cache performance metrics
     * Computer performance by orders of magnitude

   Types

     * Central processing unit (CPU)
     * Graphics processing unit (GPU)
          + GPGPU
     * Vector
     * Barrel
     * Stream
     * Tile processor
     * Coprocessor
     * PAL
     * ASIC
     * FPGA
     * FPOA
     * CPLD
     * Multi-chip module (MCM)
     * System in a package (SiP)
     * Package on a package (PoP)

   By application
     * Embedded system
     * Microprocessor
     * Microcontroller
     * Mobile
     * Notebook
     * Ultra-low-voltage
     * ASIP
     * Soft microprocessor

   Systems
   on chip
     * System on a chip (SoC)
     * Multiprocessor (MPSoC)
     * Programmable (PSoC)
     * Network on a chip (NoC)

   Hardware
   accelerators
     * Coprocessor
     * AI accelerator
     * Graphics processing unit (GPU)
     * Image processor
     * Vision processing unit (VPU)
     * Physics processing unit (PPU)
     * Digital signal processor (DSP)
     * Tensor Processing Unit (TPU)
     * Secure cryptoprocessor
     * Network processor
     * Baseband processor

   Word size

     * 1-bit
     * 4-bit
     * 8-bit
     * 12-bit
     * 15-bit
     * 16-bit
     * 24-bit
     * 32-bit
     * 48-bit
     * 64-bit
     * 128-bit
     * 256-bit
     * 512-bit
     * bit slicing
     * others
          + variable

   Core count

     * Single-core
     * Multi-core
     * Manycore
     * Heterogeneous architecture

   Components

     * Core
     * Cache
          + CPU cache
          + Scratchpad memory
          + Data cache
          + Instruction cache
          + replacement policies
          + coherence
     * Bus
     * Clock rate
     * Clock signal
     * FIFO

   Functional
   units
     * Arithmetic logic unit (ALU)
     * Address generation unit (AGU)
     * Floating-point unit (FPU)
     * Memory management unit (MMU)
          + Load-store unit
          + Translation lookaside buffer (TLB)
     * Branch predictor
     * Branch target predictor
     * Integrated memory controller (IMC)
          + Memory management unit
     * Instruction decoder

   Logic
     * Combinational
     * Sequential
     * Glue
     * Logic gate
          + Quantum
          + Array

   Registers
     * Processor register
     * Status register
     * Stack register
     * Register file
     * Memory buffer
     * Memory address register
     * Program counter

   Control unit
     * Hardwired control unit
     * Instruction unit
     * Data buffer
     * Write buffer
     * Microcode ROM
     * Horizontal microcode
     * Counter

   Datapath
     * Multiplexer
     * Demultiplexer
     * Adder
     * Multiplier
          + CPU
     * Binary decoder
          + Address decoder
          + Sum-addressed decoder
     * Barrel shifter

   Circuitry
     * Integrated circuit
          + 3D
          + Mixed-signal
          + Power management
     * Boolean
     * Digital
     * Analog
     * Quantum
     * Switch

   Power
   management

     * PMU
     * APM
     * ACPI
     * Dynamic frequency scaling
     * Dynamic voltage scaling
     * Clock gating
     * Performance per watt (PPW)

   Related

     * History of general-purpose CPUs
     * Microprocessor chronology
     * Processor design
     * Digital electronics
     * Hardware security module
     * Semiconductor device fabrication
     * Tick-tock model
     * Pin grid array
     * Chip carrier

   Retrieved from
   "https://en.wikipedia.org/w/index.php?title=Z3_(computer)&oldid=1110919
   651"

   Categories:
     * 1940s computers
     * Electro-mechanical computers
     * One-of-a-kind computers
     * German inventions of the Nazi period
     * World War II German electronics
     * Computer-related introductions in 1941
     * Konrad Zuse
     * Computers designed in Germany
     * Serial computers

   Hidden categories:
     * Articles containing German-language text
     * CS1 Italian-language sources (it)
     * CS1 German-language sources (de)
     * CS1 maint: ignored ISBN errors
     * Articles with short description
     * Short description matches Wikidata
     * Use dmy dates from July 2022
     * Use list-defined references from July 2022
     * All articles with unsourced statements
     * Articles with unsourced statements from May 2021
     * Commons category link is on Wikidata
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